ONS Search

Technical Director - PHY (Digital Design)

Full Time Semiconductor, Storage
  • Bengaluru
  • Post Date: Mar 15, 2019
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Job Detail

  • Expected Salary Band 50 - 70 P.A
  • Experience 14 - 18 Year
  • Qualification BE, BTech, MTech, PhD

Job Description

Brief : Work experience of  15~18 years in cutting edge Phy Digital Design for Industry Standard Mixed Signal SerDes protocols like PCI-E / SATA / USB / UFS / MIPI MPHY. This is an Individual Contributor role but a Definite Leader is required.

  • You will be responsible for overall technicall roadmap and architecture of the product/s.
  • Should be well versed in understanding spec requirements at system level and be able to translate the same for successful design implementation.
  • Primary role is to Architect digital IP blocks for Digital part of Phy. It involves both PCS (Physical coding sub layer) which is the protocol (control and data) part of the Phy and PMa (physical media access) is the block which closely interacts with the Analog Serdes.
  • Design of logic blocks, FSMs, clocking architectures, low power modes, Tx/Rx Advanced calibration and Equalization loops and familiar with use of uControllers for calibration and overall Phy enabling.

Responsibilities include:

  • Design of Phy PCS and PMA blocks as per SerDes standards, which include clocking controls, FSM , low power techniques, and area-efficient design concepts. Leading / driving the Phy digital effort with Phy Test Chip design and enabling.
  • Optimize across area, speed, and/or power dimensions.
  • Indepth knowledge of MAC+Phy interaction and architecting sub-system infrastructure for TestChip + MAC (FPGA) through PIPE I/F is a must.
  • Experience in high speed FPGA RTL porting, IO mapping, synthesis, timing closure
  • Firmware coding using C on industry standard ucontrollers like ARC EM / Tensilica
  • Must be well versed in RTL Verilog/VHDL
  • Must be familiar with low power design methodologies like UPF
  • Knowledgeable in advanced RTL digital design methodology
  • Working experience with Lint, CDC, Synthesis/P&R/STA, CTS, Xilinx FPGA compiler tools Conduct design, architecture, and verification reviews
  • Excellent team player and clear communicator

Required skills


NOTE : Salary mentioned is only an indication and should be used at own discretion. Not binding on ONS SEARCH since it depends on various factors.