Expected Salary Band 40 - 55 P.A
Experience 12 - 15 Year
Qualification BE, BTech, MTech, PhD
Description Summary : Emulation & Prototyping Platform Development Senior Engineering Manager
Key Responsibilities :
- Manage ASIC Emulation and Prototyping projects.
- Create Emulation and FPGA models from ASIC RTL
- Define and document RTL changes required for Emulation and FPGA builds
- Develop and Coordinate HW and SW collaterals required for Emulation and FPGA Platform
- Develop plans and detailed schedule for Emulation and FPGA platforms working with key stakeholders.
- Interface with and provide guidance to Validation and FW team with regards to features and content of Emulation and FPGA platforms
- Develop and establish processes, methodologies and metrics to drive the organization to be efficient with a first time right and on time culture
Required Experience :
- Proven leader with BSEE/MSEE and 12-15 years of ASIC/Validation experience.
- Above 3 Years of experience in managing Emulation or FPGA prototyping team.
- Hands on knowledge of commercial emulator systems - Palladium, Veloce, or Zebu. Palladium experience is prefered
- Knowledge and hands on working experience with one or more FPGA prototyping platforms like HAPS, Protium, or DINI
- Detailed knowledge of ICE mode emulation with respect to handling external interface cards is required (e.g., PCIe, UFS, etc.)
- Knowledge of Storage domain and SSD controllers in particular is a big plus
- Knowledge of SCEMI concepts would be added advantage
- Past experience in managing a small team and experience with performance management is required
- Experience with working with multiple cross site/geo team is required
- Past experience with working with EDA vendors and coordinating and tracking vendor specific issues and tool enhancements is preferred
Soft Skills: Strong management and interpersonal skills
NOTE : Salary mentioned is only an indication and should be used at own discretion. Not binding on ONS SEARCH since it depends on various factors.